The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of input voltage AV33. The normal operation voltage range of AV33 is 3.0v~3.6v. When the detected supply voltage(AV33) increases beyond the detection level(VR33), the corresponding output OUTP is generated as a high level logic. When the detected voltage(AV33) decreases below the detection level(VF33), the corresponding output OUTP is generated as a low level logic. This system consists of one comparator sub-circuit and needs an external bandgap. And the output may be in the wrong voltage level during the power-up phase before the bandgap becomes stable.
- Process: UMC 0.18um 1.8v/3.3v 1P6M Logic process
- Supply voltage: 1.8v+/-10% (AV18), 3.3v+/-10% (AV33)
- Trigger voltage: 2.6v +/- 0.1v (to detect 3.3v supply)
- Average current: <25uA
- Operating temperature: 0c~+25c+85c
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