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Ultra-low quiescent capacitor-less LDO voltage regulator in Samsung Foundries 65nm LFR6LP
The qLR-Della-cl-ref-[1.8-5.5]-[0.9-1.4].02 is an ultra-low-quiescent and capacitor-less linear regulator used to supply SoC always-on domain. It is designed for Samsung Foundries 65nm LFR6LP process.
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LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL