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Ultra-low Phase Noise 5GHz VCO in 40nm CMOS
This Voltage-Controlled Oscillator (VCO) IP block, designed in TSMC 40nm CMOS process, is an essential ultra-low phase noise building block for high-performance analog PLLs with outstanding spectral purity. It features a capacitor bank for tuning, an analog input for temperature compensation, and an analog input for fine tuning the oscillation frequency.
The state-of-the-art phase noise performance of this VCO makes it an ideal building block for applications with very low jitter requirements.
The state-of-the-art phase noise performance of this VCO makes it an ideal building block for applications with very low jitter requirements.
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VCO IP
- Active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency
- Active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency
- High-Performance RFPLL with Wide-Tuning VCO (Fmid=6GHz) - STMicroelectronics 65nm
- High-Performance RFPLL with Wide-Tuning VCO (Fmid=6GHz) + GSM VCO (Fmid=7.2GHz) - STMicroelectronics 65nm
- VCO 12-14GHz, 64 subbands
- VCO auto-calibration for Varactor 7bit