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Ultra-low jitter, type-I ADDLL with adaptive dither cancellation-3GHz-5GHz
InCirT’s Type-I ADDLL5GGF22 is an all-digital delay-locked loop (ADDLL) featuring an adaptive dithering cancellation technique. This innovation ensures ultra-low jitter performance (less than 1 ps RMS jitter at 5 GHz) while maintaining low power consumption (15mW at 5 GHz) and operating within a frequency range of 3 GHz to 5 GHz. The ADDLL5GGF22 aligns its high-speed source clock with a reference clock operating at up to 1 GHz.
With an ultra-compact footprint (0.008 sq mm), it is particularly suited for SoC designs that require precise phase synchronization across multiple clock domains. The delay resolution is as fine as 700 fs. Thanks to its adaptive dithering cancellation technique, it mitigates dithering issues, significantly enhancing jitter performance.
With an ultra-compact footprint (0.008 sq mm), it is particularly suited for SoC designs that require precise phase synchronization across multiple clock domains. The delay resolution is as fine as 700 fs. Thanks to its adaptive dithering cancellation technique, it mitigates dithering issues, significantly enhancing jitter performance.
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Block Diagram of the Ultra-low jitter, type-I ADDLL with adaptive dither cancellation-3GHz-5GHz
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