Ultra-low jitter, low-power ring-oscillator-based PLL - 4.5GHz-9.5GHz
Due to its ultra-small area (0.007sq mm) APPLL9GGF22 is an ideal candidate for SOC designs requiring multiple clock domains.
APLL9GGF22 is an integer-N PLL which gives flexibility to the designers to find the best clock-domain in the overall system.
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