UFS Device IP

The SmartDV UFS DEVICE IP Core is full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA development. The UFS DEVICE IP can be implemented in any technology. The UFS DEVICE IP core is fully compliant with JESD220E UFS Specification. It can also supports a variety of host bus interfaces for easy adoption into any design architecture - AHB, APB, OCP, Wishbone, VCI, Avalon PLB, Wishbone or custom buses.

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