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UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
The UFS IP family consists of UFS 2.0 Host controller IP, UFS 2.0 Device controller IP, and M-PHY3.0. The UFS 2.0 digital controller IP has incorporated the MIPI UniPro version 1.6 link layer with support for multi-lane operation and the optional Unified Memory Architecture (UMA) implementation.
The UFS compliant IP cores are interface building blocks that simplify interconnect architectures in mobile platforms. This leads to smaller footprint, greater interoperability between mobile IP, chips and devices from diverse sources, and lower power and EMI.
The UFS compliant IP cores are interface building blocks that simplify interconnect architectures in mobile platforms. This leads to smaller footprint, greater interoperability between mobile IP, chips and devices from diverse sources, and lower power and EMI.
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Block Diagram of the UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
ufs IP
- UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0
- MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
- UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8
- UFS Host Controller IP
- UFS 2.1 Host Controller compatible with M-PHY 3.1 and UniPro 1.6
- UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8