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TSMC embedded flash controller
The eSi-TSMC-Flash IP core provides an AMBA 3 AHB-lite interface to TSMC's embedded flash macros.
This AHB controller allows a CPU and other peripherals to easily read, execute code from, erase and program a TSMC embedded flash's data and information blocks.
This AHB controller allows a CPU and other peripherals to easily read, execute code from, erase and program a TSMC embedded flash's data and information blocks.
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AHB IP
- SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
- AHB Octal SPI Controller with Execute in Place
- FlexNoC 5 Network-on-Chip (NoC)
- FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
- CodaCache® Last Level Cache IP
- eMMC 5.1 Host Controller