The “IGAPLLP01A” is a general purpose de-skew Phase Locked Loop (PLL) without external component.
The IGAPLLP01A incorporates several frequency dividers to generate various output frequencies for different application.
The VCO frequencies range from 800MHz to 1700MHz by divider setting and reference clock from 10MHz to 160MHz.
The feedback clock input pin can support the clock de-skew application.
A power down mode is available to shut down the power of the PLL circuit.
Bypass and power down mode are both available.
- TSMC 90nm 1.2V/1.8(1.2)V CMOS logic low power (CLN90LP) pro-cess
- TSMC 90nm 1.2V/1.8(1.2)V CMOS logic with 1P4M GDS
- Wide output frequency range:12.5MHz ~ 1700MHz
- Flexible input frequency range:10MHz ~ 160MHz
- 1.8(1.2)V analog supply operation and 1.2V digital supply operation
- Optimized for input/output clock de-skew
- Power-down capability
- Bypass mode
- Lock detection function