TSMC CLN40ULP 40nm Multi Phase DLL - 75MHz-375MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock. It delivers optimal jitter performance over a wide frequency range. The analog delay-line architecture used in our DLL design is internally isolated from supply noise for very low output jitter. The analog delay line also provides duty cyle correction.

• 查看 TSMC CLN40ULP 40nm Multi Phase DLL - 75MHz-375MHz 完整数据手册
• 联系 TSMC CLN40ULP 40nm Multi Phase DLL - 75MHz-375MHz 供应商