You are here:
TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications. The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm.
Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs). The library is compatible with flip-chip packaging. The GPIO driver pad incorporates the Schmitt-Trigger function, programmable drive strength, and pull-up/down resistors, with robust HBM and CDM ESD protection. Synopsys’ broad GPIO IP offering helps achieve your SoC design’s critical power, performance, and area (PPA) requirements, delivering low-risk solutions in a fast time-to-market.
Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs). The library is compatible with flip-chip packaging. The GPIO driver pad incorporates the Schmitt-Trigger function, programmable drive strength, and pull-up/down resistors, with robust HBM and CDM ESD protection. Synopsys’ broad GPIO IP offering helps achieve your SoC design’s critical power, performance, and area (PPA) requirements, delivering low-risk solutions in a fast time-to-market.
查看 TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks 详细介绍：
- 查看 TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks 完整数据手册
- 联系 TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks 供应商