The ARKT12FFC_POR08 IP belongs to a family of power on reset(POR) circuit
POR : Power on reset circuit generates output flag signal once the power supply voltage rises above specified level.
The ARKT12FFC_POR08 will generate a log “high” output signal once the Core power supply voltage(DVDD) rises above specified level(V~TH_RISE~). And the cell will generate a logic “low” output signal after the power supply voltage(DVDD) drops below another specified level(V~TH_FALL~) which specified by parameter as hysteresis(V~TH_HYS~).
The ARKT12FFC_POR08 IP solutions for integration on SoC. It is specified from –40°C to +125 °C.