Linear regulator with ultra low quiescent current for retention applications
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Triple Video DAC 10-Bits, 240Mhz
This IP is composed of a triple channel 10-bits 240 MS/s DAC, designed for industry standard 0.18um 1P6M CMOS technology supplied at 3.3V.
Each independent DAC uses a segmented current steering architecture, combined with improved twodimensional centroid switching scheme, to achieve simultaneously high update rates, at least 10-bit of intrinsic static accuracy, and a very good dynamic
characteristics.
The differential output supports single-ended applications and is designed to be loaded by double 75Ω line termination, (37.5Ω).
An external resistor, 1k8Ω typical is used to set the full scale current of the DAC.
Each independent DAC uses a segmented current steering architecture, combined with improved twodimensional centroid switching scheme, to achieve simultaneously high update rates, at least 10-bit of intrinsic static accuracy, and a very good dynamic
characteristics.
The differential output supports single-ended applications and is designed to be loaded by double 75Ω line termination, (37.5Ω).
An external resistor, 1k8Ω typical is used to set the full scale current of the DAC.
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