MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Timer with APB interface
特色
- Speed: 66MHz APB Clock Rate Support
- Power consumption: 1.8mW power for normal case at 50MHz
- Area: 2K for 0.25um Faraday cell library
- 3 independently programmable 32-bit timer/counters
- Internal or external clock source
- Interrupt generated either overflow or regular intervals
- Each timer/counter has two match registers
- Counters can be incrementing or decrementing
- Current value of each count register can be read at any time
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