The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
In high-volume production since 1995, the technology relies on a split-gate cell design and thick oxide tunneling injector. SST continues to improve the technology, now in its third generation incarnation at advanced process nodes down to 28nm.
The technology has a number of distinct advantages. First, design using SuperFlash macro benefit from low power consumption during program due to low current source side injection and during erase due to low FN tunnelling current. Higher bandwidth is achievable because of the fast access time while the endurance and retention characteristics of the technology achieve best in class reliability. Manufacturability has been demonstrated at multiple process nodes and foundries. Finally, broad deployment of the technology across a variety of applications is enabled by customized solutions for various market segments.
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