NVM OTP NeoBit in TSMC (350nm, 250nm, 180nm, 160nm, 130nm, 110nm, 90nm, 80nm, 55nm, 40nm)
Ternary-CAM/Binary-CAM, supports process FF
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memory compiler IP
- Ultra High-Speed Cache Memory Compiler
- TSMC CLN12FFC Ternary Content Addressable Memory Compiler
- TSMC CLN5FF Ternary Content Addressable Memory Compiler with Column Redundancy
- TSMC CLN7FF Pre-search and Pipeline Ternary Content Addressable Memory Compiler
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k