MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Tensilica DSP IP supports efficient AI/ML processing
The Tensilica AI Base platform offers 8 GOPS to up to 2 TOPS of AI performance and includes the popular Tensilica HiFi DSPs for audio/voice, Vision DSPs, and ConnX DSPs for radar and communications. The DSPs are based on the VLIW and SIMD architectures, with instruction sets optimized for specific domains, including extensions for AI. Customers benefit from the domain-specificity, extensibility, and configurability they have come to expect from the trusted, mature Tensilica DSP architecture. SoC designers can extend the base architecture to address specific workload requirements and create differentiation. These DSPs also offer a scalable multiplier accumulator (MAC) block that can run custom AI workloads efficiently, as well as an optimized NN library and comprehensive software support.
查看 Tensilica DSP IP supports efficient AI/ML processing 详细介绍:
- 查看 Tensilica DSP IP supports efficient AI/ML processing 完整数据手册
- 联系 Tensilica DSP IP supports efficient AI/ML processing 供应商
AI IP
- RT-630 Hardware Root of Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- RT-630-FPGA Hardware Root of Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- NPU IP for Embedded AI
- RISC-V-based AI IP development for enhanced training and inference
- Tessent AI IC debug and optimization
- NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof