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PCIe 5.0 EP/RP/DM/SW Controller IP
The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security Modules, IP Prototyping Kits and verification IP, is designed to meet all required features of the PCI Express® (PCIe®) 6.0, 5.0, 4.0, 3.1, 2.1, 1.1, and PIPE specifications. By providing a complete IP solution, Synopsys delivers optimization across the individual IP to lower latency and ensures that all the IP functions seamlessly together to lower integration risk. The high-performance PCI Express IP solution is optimized for low power, small area and low latency. The high-quality IP solution has been extensively validated with multiple hardware platforms, PHYs, and PCIe verification suites across a broad range of processes and foundries. With thousands of design wins and products shipping in volume, Synopsys’ expertise in developing and supporting the PCI Express interface enables designers to accelerate time-to-market and achieve silicon success for their advanced SoCs.
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PCIe 5.0 IP
- PCIe 5.0 PHY in TSMC (16nm)
- PCIe 5.0 Customizable Embedded Multi-port Switch
- PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PCIe 5.0 Controller with AMBA AXI interface
- PHY/PCS Logical Sub-Block IP Core for PCIe supporting PCIe 5.0, 4.0, 3.1 PHY/PMA and compliant to the PIPE 5.2 and 4.4.1 Specifications
- Configurable controllers for PCIe 5.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications