10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC
Synchronous Single-Port, Dual-Port and Two-Port Regiser File
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Synchronous Single-Port IP
- SMIC 0.13um High-Speed Synchronous Single-Port/Dual-Port SRAM
- VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler, Memory Array Range:256 to 128K Bits
- VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits
- VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler, Memory Array Range:128 to 512K Bits
- UMC 55nm Low-K/Low-Power Logic process synchronous ultra-high-speed single-port SRAM compiler.
- Synchronous single-port, dual-port, and two-port register files