The Mentor Graphics integrated host controller uses patent-pending StorSelect(TM) technology to combine together an IDE host controller with a PCMCIAhost controller into a single core with shared pins to reduce pin count, saving approximately 35 pins. The parallel ATAcontroller supports the PCMCIAand compact Flash protocols simultaneous with IDE/ATAand CF+ protocols. The core supports concurrent overlapped transfers to both IDE/CF+ and PCMCIA/CFdevices. When overlapping transactions occur,the PCMCIA/CF access is given priority.If an IDE/CF+ transaction is in progress when a PCMCIA/CF access request is received, the transfer is automatically paused to allow the PCMCIA/CF access, and the transfer is automatically resumed after the PCMCIA/CF access.