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Standard Compliant AMBA AXI SoC Interconnect, Soft IP
The AMBA AXI interface is targeted at high-performance, high-frequency system designs and includes a number of features that make it suitable for a high-speed submicron interconnect. The AXI protocol is burst-based. Every transaction has address and control information on the channel that describes the nature of the data to be transferred. The data is transferred between master and slave using a write data channel to the slave or a read data channel to the master.
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AMBA AXI IP
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC with AMBA AXI User Interface
- Many-Channel Centralized DMA Controller with AMBA AXI Interconnect
- pico 2D Graphics Processor for Wearables/IoT
- XpressCCIX-AXI Controller IP for PCIe 5.0 with CCIX ESM support
- SD 4.1 SDIO 4.1 Host Controller IP