Analog Front End: 8x 12-bit 2 GSPSADCs, 4x 12-bit 200 MSPS ADCs, TVM, PLL, LDO
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Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process 12-Track Standard Cell Library.
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