MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
You are here:
Standard Cell (Generic) Library IP, UMC 0.5um process
UMC 0.5um Logic process standard Core Cell Library.
查看 Standard Cell (Generic) Library IP, UMC 0.5um process 详细介绍：
- 查看 Standard Cell (Generic) Library IP, UMC 0.5um process 完整数据手册
- 联系 Standard Cell (Generic) Library IP, UMC 0.5um process 供应商