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Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (C50 Generic Core).
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Library
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
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