DDR2/DDR3/DDR3L/LPDDR/LPDDR2/LPDDR3 6 in one combo IO with auto calibration - 40nm LL
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Standard Cell (ECO) Library IP, RVT, UMC 65nm SP process
metal-1 start Gate Array ECO Library for UMC 65nm SP/RVT(FSE0A_D).
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