You are here:
SPI Serial Peripheral Interface Master/Slave
The CC-SPI-APB is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller. The SPI core can be efficiently implemented on FPGA and ASIC technologies.
查看 SPI Serial Peripheral Interface Master/Slave 详细介绍：
- 查看 SPI Serial Peripheral Interface Master/Slave 完整数据手册
- 联系 SPI Serial Peripheral Interface Master/Slave 供应商
Block Diagram of the SPI Serial Peripheral Interface Master/Slave
