MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm)
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Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process 2.5/3.3V SSTL2 ClassI/LVTTL combo IO with POC (Pad On Circuit).
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