MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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Specialty Analog ESD IO IP, 1.5V Operations, UMC 0.15um SP process
UMC 0.15um SP process 1.5V Analog ESD IO set.
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