The Spatial image transformation core is a signal processing accelerator designed for single or multi-channel image manipulations based on matrix multiplication. The core is packaged as an AXI-Stream compatible accelerator, which features a bi-cubic interpolation for reconstruction and parallel access to embedded dual port memory resources for row buffering. RGB or single channel pixel patterns with 8/10/12 bit depths are available for configuration and resolution is adjustable post implementation. Resource critical parameters, such as memory size, are variable to optimize the architecture for different types of transformations.
The Spatial image transformation core is packaged for the Xilinx IP Integrator tool and can be combined with other Xilinx IP cores. The parameters are completely configurable in the module allowing the designer to adjust for different image processing pipelines.