Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
Spartan-6 FPGA Integrated Endpoint Block for PCI Express (PCIe)
查看 Spartan-6 FPGA Integrated Endpoint Block for PCI Express (PCIe) 详细介绍:
- 查看 Spartan-6 FPGA Integrated Endpoint Block for PCI Express (PCIe) 完整数据手册
- 联系 Spartan-6 FPGA Integrated Endpoint Block for PCI Express (PCIe) 供应商
Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC