SMIC 90nmLL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler
The compiler supports a comprehensive range of word length and bit length. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMIC 90nm Low-Leakage Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 6, 7, 8, or 9 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
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