MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
SMIC 130nm LL Standard digital,analog and oscillator IO
特色
- Standard digital,analog and oscillator IO;
- Cell Size (Width * height) 60um * 106um and 130 um * 106 um (OSC IO) with DUP in-line bonding pads; 88 um * 106 um (PVDD1CER) without bonding pads;
- Work voltage: 1.8V~3.3V power;
- SMIC 0.13?m SMIC Logic Salicide 1.5V/3.3V Low Leakage Process;
- SMIC 0.13?m e-flash (pFlash) Salicide 1.5V/3.3V/5V Low Leakage Process;
- Suitable for 5,6,7 and 8 layers application;
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