The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of its power supply AV33. The normal operation voltage levels of AVDDL and AVDDH are 1.62v~1.98v and 3.0v~3.9v respectively. When the detected voltage AVDDH increases across the detection level VR33, the output OUT is generated as a high level logic. When the detected voltage AVDDH decreases across the detection level VF33, the corresponding output OUT is generated as a low level logic. This system contains one comparator sub-circuit and need a bandgap. And the output may be in the wrong voltage level during the power-up phase before the bandgap become stable.