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SMIC 0.13um High-Speed Synchronous Two-Port Register File
VeriSilicon SMIC 0.13um Synchronous Two-Port Register File optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V process.
While satisfying speed and power requirements, it was optimized for area efficiency.
VeriSilicon SMIC 0.13um Synchronous Two-Port Register File uses four metal layers within the blocks and supports metal 6,7,8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
While satisfying speed and power requirements, it was optimized for area efficiency.
VeriSilicon SMIC 0.13um Synchronous Two-Port Register File uses four metal layers within the blocks and supports metal 6,7,8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
特色
- Two Ports (one read and one write)
- High Density
- High Speed
- Size Sensitive Self-time Delay for Fast Access Time
- Automatic Power Down
可交付内容
- Databook in electronic format
- Verilog models and Synopsys synthesis models
- Candence Silicon Ensenble Abstracts (LEF), Avanti! Apollo data, GDS II, LVS netlist
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High Speed IP
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