You are here:
SMBUS Master IP
SMBUS Master interface provides full support for the two-wire SMBUS Master synchronous serial interface, compatible with SMBUS version 3.1 specification. Through its SMBUS Master compatibility, it provides a simple interface to a wide range of low-cost devices. SMBUS Master IIP is proven in FPGA environment. The host interface of the SMBUS Master can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.
查看 SMBUS Master IP 详细介绍：
- 查看 SMBUS Master IP 完整数据手册
- 联系 SMBUS Master IP 供应商
smbus IP
- TSMC 6nm (6FF) 3.3V SMBUS (I2C) IO
- TSMC 7nm (7FF) 3.3V SMBUS (I2C) IO
- I2C & SMBus Controller
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- A TSMC 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- 1.8V/3.3V Switchable GPIO With 3.3V I2C Open Drain & Analog in TSMC 22nm