The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface. It is compliant with the Rev 3.1 of the SMBus specification.
The design supports the Sm, Fm and Fm+ modes of operation at the SMBus operating voltage (VDDP) of either extended range 3.3V or standard 1.8V logic.
This 7nm library is available in a staggered flip chip implementation.
To utilize these cells in the pad ring, an additional library is required – 1.8V Support: Power. That library contains the power cells, the POC cell, and a rail splitter to isolate the SMBus cells in their own power domain as recommended. It also contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. The rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
▪ JEDEC compliant
o 2KV ESD Human Body Model (HBM)
o 500 V ESD Charge Device Model (CDM)
▪ JEDEC compliant
o Tested to I-Test criteria of ± 100mA @ 125°C
- • Supported I2C operating modes:
- o Standard-mode (Sm) – 10 to 100 kbps data rate
- o Fast mode (Fm) – 10 to 400 kbps data rate
- o Fast mode (Fm+) – 10 kbps to 1 Mbps data rate
- • Open drain operation only (floating NWELL with PMOS used for ESD protection only)
- • Built-in output slew rate control to meet I2C Tof minimum of (20 x VDDP/5.5V) ns
- • Output enable
- • Receiver enable
- • ESD protection is accomplished with an SCR (no diode to the positive power supply)
- • Standard LVCMOS compatible inputs with Schmitt trigger (hysteresis) option
- • Power-on sequencing independent design with Power-On Control
- • DVDD = 1.62V to 1.98V
- • Pad VDDP (power supply reference for Output)
- o 2.7V to 3.63V – extended range 3.3V
- o 1.62V to 1.98V – standard range 1.8V
- • The circuit consumes no DC supply current in the static state
- An open-drain design, this cell requires an external pull-up resistor to a high voltage power supply. The pull-up power supply (VDDP) can be 3.63V maximum, independent of the I/O cell power supply (DVDD). In a 1.8V SMBus application, VDDP can track DVDD but it is not necessary.
- Vertical-only (_V) and and horizontal-only (_H) variants provided.
- a. Physical abstract in LEF format (.lef)
- b. Timing models in Synopsys Liberty formats (.lib and .db)
- c. Calibre compatible LVS netlist in CDL format (.cdl)
- d. GDSII stream (.gds)
- e. Behavioral Verilog (.v)
- f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- g. Databook (.pdf)
- h. Library User Guide - ESD Guidelines (.pdf)