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SM4-XTS Multi-Booster

The SM4-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the SM4 algorithm (a block cipher specified by the OSCCA) making the solution ideal for high-end applications (including key, tweak, input and output registers and Galois field multiplier).

This crypto engine targets high-performance applications such as data storage and memory encryption. Thanks to its scalability, it can be tailored to reach the best trade-off between performances, area and technology.

Overview
The SM4-XTS crypto engine is easily portable to ASIC and FPGA. It supports a wide range of applications on various technologies. The unique architecture enables a high level of flexibility. The throughput and features required by a specific application can be taken into account in order to select the most optimal and compact configuration.

For other XTS Multi-Booster solutions, please see dedicated product sheet: AES-XTS Multi-Booster (BA416). We also offer a multi-purpose SM4 Crypto Engine (BA419)

特色

ASIC and FPGA
High throughput:

ASIC: >400 Gbps
FPGA: 100 Gbps/s

Scalable solution
Can be provided with AXI DMA & software
Masking option available with excellent protection against SPA & DPA
Cipher stealing (optional)
Low power feature
Straight forward integration with simple FIFO interfaces

优势

Off-the-shelf, predictable and silicon-proven solution
Easy-to-Integrate
Unrivaled speed performance
Logic footprint optimized to performance requirements and used functionalities
Scalable Multi-Core solution enabling best trade-off between area and performance
Portable and optimized to ASIC or FPGA technology
Upgradeable to new performance requirements or to new generations of ASIC or FPGA technology
User-friendly Software API