10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC
Single Port SRAM compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits
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SRAM IP
- Memory (SRAM, DDR, NVM) encryption solution
- Complete Neural Processor for Edge AI
- Intrinsic ID Zign® 100 - Software implementation of SRAM PUF
- Intrinsic ID Zign® 200 - Software implementation of SRAM PUF with symmetric cryptography
- Intrinsic ID Zign® 300 - Software implementation of SRAM PUF with symmetric & asymmetric cryptography + PKI
- 32-bit SRAM/PROM Controller