USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm)
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Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
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