DDR2/DDR3/DDR3L/LPDDR/LPDDR2/LPDDR3 6 in one combo IO with auto calibration - 40nm LL
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Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous High-density Single Port SRAM memory compiler.
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