The CMS0021 single-channel DVB-C/J83 modulator is fully compliant with the European, US and Japanese downlink cable Standards DVB-C EN 300 429 and ITU J83 Annexes A/B/C (including DOCSIS 1.1/2.0). The core provides all the necessary functions between transport stream input and a modulated QAM output.
J.83B designs can operate either from internal memory (short interleaving modes) or from shared external memory (long interleaving modes) by means of a versatile access controller.
Typical applications of the CMS0021 include head-end video and broadband data transmissions systems (CMTS), cable modem test equipment and point-to-point (PTP) or point-to-multipoint microwave radio links.
A range of synthesis options allows the core to be tailored for any particular application..
- Compliant with DVB-C (EN 300 429); ITU J.83 Annexes A, B and C; DOCSIS 1.x, 2.0 and 3.0.
- Scalable architecture supports multiple instances per FPGA.
- Modulation accuracy > 40dB (MER).
- On-chip or off-chip interleaving RAM.
- Variable symbol-rate interpolation.
- Software selectable channel filter.
- AD9857 interface and auto-programming support.
- Extension core available for SPI/ASI interface with integrated PCR TS re-stamping, NULL TS packet removal/filtering and NULL/PRBS TS packet insertion.
- Seamless integration with Altera ASI megacore when using SPI/ASI extension core.
- Optional input and output TS rate estimation registers.
- Modes that are not required may be removed with synthesis options to generate a compact, efficient design.
- Designed for very efficient FPGA implementation without compromise to the targeting of gate array or standard cell structures such as Altera HardCopy.
- Supplied as a protected bitstream or netlist (megacore for Altera FPGA targets).
- Optimised for Xilinx and Altera.
- Evaluation boards available