The eSi-SHA256 core is an easy to use SHA hash accelerator peripheral for both SHA256 and SHA224. with an APB bus interface.
SHA2 is a cryptographic hash function designed by the United States National Security Agency and is a U.S. Federal Information Processing Standard published by NIST. There are various hash lengths that are supported in the NIST standard, this core supports SHA256 and SHA224.
- Simple register based interface
- 65 clock cycles per 512 bits of input data
- AMBA 3 APB slave interface
- DMA flow-control interface
- Verilog 2001.
- low gate-count
- easy to use
- Software libraries
Block Diagram of the SHA256 & SHA224 core with APB interface