MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration
(OSCCA) and targeted for the China market only. Complex system-on-chip (SoC) requirements can include security at various application layers. The Synopsys Security Protocol Accelerator SMx (SPAcc-SMx) IP addresses the application space requiring the use of Chinese security algorithms SM3 and SM4.
The SPAcc-SMx IP offers high throughput with support for mixed packet size traffic and low latency to preserve quality of service in voice and video applications in single- and multi-core processor architectures. The product is highly customer configurable enabling solutions to be tuned for specific applications providing differentiation in the market.
(OSCCA) and targeted for the China market only. Complex system-on-chip (SoC) requirements can include security at various application layers. The Synopsys Security Protocol Accelerator SMx (SPAcc-SMx) IP addresses the application space requiring the use of Chinese security algorithms SM3 and SM4.
The SPAcc-SMx IP offers high throughput with support for mixed packet size traffic and low latency to preserve quality of service in voice and video applications in single- and multi-core processor architectures. The product is highly customer configurable enabling solutions to be tuned for specific applications providing differentiation in the market.
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