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Secured 1553 FPGA IP Core
The world’s first secured MIL-STD-1553B FPGA IP Core. Based on the popular BRM1553D , the secured 1553 IP core enables real-time detection and prevention of various cyber attacks on the MIL-STD-1553B bus and it’s LRUs and sub-systems. The Secured 1553 FPGA IP is designed for integration into any FPGA based design and enables immediate protection to the entire bus from a single point regardless of the bus topology – star or multi drop.
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MIL-STD-1553 IP
- DO-254 MIL-STD-1553 1.00a
- Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
- MIL STD 1553 Controller IP
- MIL-STD-1553 A/B compliant IP with DDC software API and register compatibility
- Mil-STD-1553B BC/RT/MT with PCI interface IP Core for FPGA
- MIL-STD-1553 Bus Controller, Remote Terminal, and Monitor Terminal