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Secured 1553 FPGA IP Core
The world’s first secured MIL-STD-1553B FPGA IP Core. Based on the popular BRM1553D , the secured 1553 IP core enables real-time detection and prevention of various cyber attacks on the MIL-STD-1553B bus and it’s LRUs and sub-systems. The Secured 1553 FPGA IP is designed for integration into any FPGA based design and enables immediate protection to the entire bus from a single point regardless of the bus topology – star or multi drop.
特色
- Compact VHDL IP code for integration in inside avionic products.
- Supporting MIL-STD-1553B protocol as Bus Controller, Remote Terminal or Monitor
- Works with any COTS transceiver and transformer and with extended features when used with the DES1553XVR transceiver
- Monitors and protects the entire bus from a single point regardless of the bus topology – star or multi-drop
- Passive technology without any transmission on the bus.
- Programmable security profiles for various communication types and roles
- SPI based development kit for multi role secured 1553 development
- Device drivers for : VxWorks 7.0, Linux, Embedded Linux, Integrity, QNX , PikeOS
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MIL-STD-1553
- DO-254 MIL-STD-1553 1.00a
- Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
- Mil-STD-1553B BC/RT/MT with PCI interface IP Core for FPGA
- MIL-STD-1553 Bus Controller, Remote Terminal, and Monitor Terminal
- Wiring Fault Detection FPGA IP Core for MIL-STD-1553 and ARINC825
- DO-254 Ready MIL-STD-1553 A/B compliant IP with DDC software API and register compatibility