MIPI CSI2 rev 2.0 transmitter/controller for FPGA, with 8 lanes and 2.5Gbps per lane
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Secure-IC's Securyzr™ SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock cycle to optimize the silicon resource/performance ratio. Fixed-length or extendable-output (XOF) functions can simply be chosen per individual message through configuration settings.
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Block Diagram of the Secure-IC's Securyzr™ SHA-3 Crypto Engine
