Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC
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SC6MC ECO Kit - UMC 55 nm L55ULP
ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering optimal performance, power and area results.
特色
- Large cells set to support ECO changes for any design type.
- About 80 cells and 35 functions
- Simple cells like inverter, buffer, NAND, AND, OR and NOR
- Complex combinatorial cells like AND/OR, OR/AND, and XOR/NOR gates
- Multiplexers
- Latches
- Scan flip-flops
- Layout finishing cells
- ECO fabric cells with and without fill capacitance capabilities
- Multi-Vdd Characterization
可交付内容
- Front End (FE) and Back End (FB) views with full suite of design views and models that support most of the industry's popular design tools can be downloaded from the ARM DesignStart web site at: http://www.arm.com/support/designstart.php
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Logic IP
- H.264 Baseline Encoder with compressed reference frame store
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES (55nm, 40nm)
- 90nm FTP Non Volatile Memory for Standard CMOS Logic Process
- 130nm OTP Non Volatile Memory for Standard CMOS Logic Process
- 130nm FTP Non Volatile Memory for Standard CMOS Logic Process