The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. SATA-HC IP block simplifies the integration of high capacity SSDs utilizing SATA I/II/III at 1.5/3/6Gbit/s data rates.The serial link employed is a high-speed differential layer that utilizes Gigabit technology and 8b/10b encoding.The VHDL source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.The lower protocol layers Phy/Link/Transport are implemented in an all-RTL solution, which minimizes access time by providing the shortest possible path between SSD and application.