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Samsung 28nm Low Power Single-Port SRAM Compiler
VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for Samsung FDSOI 28nm process can flexibly generate memory blocks via a friendly GUI or shell commands. It uses copper metallization with 10 metal levels (6 thin + 2 medium + 2 thick) and ultra low-K dielectrics.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler uses thin metals up to metal5 and supports the metallization options of 6U1x_2U2x_2T8x_LB and 6U1x_2T8x_LB. Dummy bit cells are designed in with the intention to enhance reliability.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler uses thin metals up to metal5 and supports the metallization options of 6U1x_2U2x_2T8x_LB and 6U1x_2T8x_LB. Dummy bit cells are designed in with the intention to enhance reliability.
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