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RISC-V Processor With Posits
CRISP is a CPU Core built by integrating our PNU with 64-bit RISC-V Processor. RISC-V is a royalty free open-ISA. CRISP makes use of Bluespec Inc’s Flute core (open-source RISC-V) core. CRISP was extensively verified using Bluespec’s RV-factory.
CRISP as world’s first posit-capable RISC-V CPU was demonstrated at RISC-V Workshop in Zurich in June’19. CRISP –core in virtual form booting Linux and running C/C++ applications natively using posits was demonstrated using FPGAs.
CRISP can be used as the fundamental computing core for building posit-enabled System-on-Chip (SoCs) for many applications.
CRISP as world’s first posit-capable RISC-V CPU was demonstrated at RISC-V Workshop in Zurich in June’19. CRISP –core in virtual form booting Linux and running C/C++ applications natively using posits was demonstrated using FPGAs.
CRISP can be used as the fundamental computing core for building posit-enabled System-on-Chip (SoCs) for many applications.
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RISC-V Processor IP
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- 32-bit Embedded RISC-V Functional Safety Processor
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