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Ultra Low Phase Noise Driver

The CC-201IP block is a revolutionary, almost zero phase noise, clock gain IP block that possesses approximately 30 dB of signal gain while contributing only 1.3nV per root Hz (rms) of circuit phase noise. The proprietary and patented design possesses a 2nd order bandpass function and is tunable from 100Mhz to 2.5Ghz. Since the IP block converts small signal, single ended inputs generated by clean clock sources, such as external fundamental and odd order crystals and sources, to amplified, differential, almost zero noise signals, the block is perfect for ADC/Track and Hold Clock Generation, DAC Clock Generation, Switched Capacitor Clock Generation and Distribution, can be used for PLL output filtering to reduce wideband harmonics and spurious frequencies, or simply used as a revolutionary ultra-low noise, high gain, Low Noise Amplifier.